Reversible logic in pipelined low power vedic multiplier
نویسندگان
چکیده
منابع مشابه
Design of ALU using reversible logic based Low Power Vedic Multiplier
Arithmetic Logic Unit (ALU) is a heart of microprocessor and microcontroller units that are playing main role in digital computers. By optimizing the ALU circuit in microprocessor and microcontroller highly power efficient digital system can be achieved. The use of low power and high performance sub-blocks like adder and multiplier can reduce the total power dissipation of ALU. So in this paper...
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ژورنال
عنوان ژورنال: Indonesian Journal of Electrical Engineering and Computer Science
سال: 2019
ISSN: 2502-4760,2502-4752
DOI: 10.11591/ijeecs.v16.i3.pp1265-1272